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  • #1130
Closed
Open
Created Jul 17, 2012 by Robert Bernecky@rbeDeveloper

AWLF unit test UTReshapebug2.sac generates 6WLs instead of one

Bugzilla Link 1005
Created on Jul 17, 2012 22:42
Version svn
OS Linux
Architecture PC

Extended Description

This innocent code generates 6 WLs:
use Array: all;
int main()
{
 A_45=iota( 24);
 A_46= _reshape_VxA_([2, 3, 4],A_45);
 A_47=reverse( A_46);
 A_48=reverse( A_47);
 z = Sel( [ 1,2,3], A_48);
 z = _sub_SxS_( z, 7);
 return(z);
}
int Sel( int[.] iv, int[*] y)
{ /* Hide _sel_() from the ravages of AWLF */
  z = _sel_VxA_( iv, y);
  return( z);
}
unless you compile it with -wls_aggressive, in which case all
but the iota() disappear, as you would desire. 
The basic problem is that the reverse() is a WL working along the first
axis, and within there is another WL to do the row selection.
I don't think this is exactly a bug, but it would be nice if 
it generated better code.
To upload designs, you'll need to enable LFS and have an admin enable hashed storage. More information
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